Understanding of the inner-workings of modern computer systems and tradeoffs present at the hardware-software interface: Instruction set design and addressing modes, register transfer, internal CPU bus structure, ALU (microprogramming and hardwired control), computer arithmetic, memory system, input-output system and survey of real computers and microprocessors.
The main objective of the course is to introduce students to the computer organization from hardware and programming . This course teaches students fundamental knowledge in computer architecture and microarchitecture. The course covers the basic organizations of computer systems including instruction-set architecture, execution pipeline, memory hierarchy, and I/O subsystem. It also addresses advanced processor microarchitecture issues such as dynamic instruction scheduling, branch prediction, lock-up free caches, instruction-level parallelism, multiple instruction fetch/issuing, speculative execution, etc. to improve computer processor performance. Shared-memory multiprocessor systems with coherent caches to reduce memory access latency are also covered. Finally, it outlines the verification issues of today's microprocessors.
| Week | Topic |
|---|---|
| 1 | Introduction: Digital computer generation, computer types and classes, functional units and their components. |
| 2 | Undersanding performance: Response Time, Throughput and Execution Time. |
| 3 | RISC-V Instrution Set and Arithmetic Operations |
| 4 | RISC-V Addressing Types |
| 5 | RISC-V Synchronization and Encoding Types |
| 6 | Arithmetics of Computers: Addition, Subtraction, Multiplication and Division |
| 7 | Floating Points Formats |
| 8 | Midterm Exam. |
| 9 | CPU Control Unit and Building Datapath |
| 10 | RISC-V Pipeline - Stages: Fetch, Decode, Execute, Memory. Write Back. Hazard Types, I/O Systems, Interupts and Exceptions |
| 11 | Logic Design Basics and Boolean Algebra |
| 12 | Memory Hierarchy and Principle of Locality |
| 13 | Cache and Virtual Memory |
| 14 | Parallel Programming, Multithreading and GPU Architecture |
| Method | % Each | Quantity |
|---|---|---|
| Homework | 10 | 2 |
| Midterm Exam(s) | 30 | 1 |
| Project | 20 | 1 |
| Final Exam | 30 | 1 |
1. Computer Organization and Design: The Hardware/Software Interface – RISC-V Edition 2. The Essentials of Computer Organization and Architecture, 3. Edition, 2011, Linda Null and Julia Lobur, Jones and Bartlett Publishers.